Page 1 of 1

Volker Barthelman's/Frank Wille's Vasm assembler(madmac)

Posted: Tue Mar 24, 2015 6:11 pm
by a31chris
I am going to start a new thread for this as it deserves one.

A new build of VASM for the Jrisc is here. It's farther along now but still in it's infancy. I will be able to test it this weekend. It will be up and available for download by tonight or tomorrow.
Ok... I did it. The last days I implemented a whole new syntax module
for MadMac compatibility.

The new source snapshot will be available in 11 hours.

Build the new vasm for Jaguar with MadMac syntax like this:
make CPU=jagrisc SYNTAX=madmac

Please report any problems which are left.

What I didn't find out:

1. When you have a .text section and switch into absolute mode with .org,
how do you return to .text in MadMac? With another .text directive?

2. What does .gpumain do? I left it out.

Regards,

--
Frank Wille
http://sun.hasenbraten.de/vasm/index.php?view=relsrc

I already talked to him about the .gpu main directive. The other one I couldn't help with.

JRISC VASM 32bit Windows build

Posted: Wed Mar 25, 2015 6:13 pm
by a31chris
Here is the 32bit Windows build of VASM_madmac for anyone who wants to try it out.
vasmjagrisc_madmac.zip
(161.7 KiB) Downloaded 105 times

Re: JRISC VASM

Posted: Wed Mar 25, 2015 6:36 pm
by a31chris
I actually had some time this morning so I couldn't control my curiousity and gave the new madmac backend a spin.

Once again I am using the test asm output file from the Jaguars only risc gcc.

Below that will be the the results of VASM_madmacs first testrun on it.

Here is the test source:

Code: Select all

;GCC for Atari Jaguar GPU/DSP (Jun 12 1995) (C)1994-95 Brainstorm
   MACRO   _RTS
   load   (ST),TMP
   jump   T,(TMP)
   addqt   #4,ST   ;rts
   ENDM
_test_start::
   .GPU
   .ORG   $F03000
ST   .REGEQU   r18
FP   .REGEQU   r17
TMP   .REGEQU   r16
GT   .CCDEF   $15
gcc2_compiled_for_madmac:
   ;(.DATA)
   .LONG
_global::
   .DC.L   5
   ;(.TEXT)
   .EVEN
_GetTest1::
   subqt   #4,ST
   store   FP,(ST)
   move   ST,FP   ;link
   subqt   #8,ST
   move   FP,r1   ;movsi   FP->r1
   move   FP,r2   ;movsi   FP->r2
   subqt   #4,r2   ;isubqtsi3   r2-#4->r2
   move   r2,r3   ;movsi   r2->r3
   store   r0,(r3)   ;movsi   r0->(r3)
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #8,r4   ;isubqtsi3   r4-#8->r4
   move   r4,r0   ;movsi   r4->r0
   moveq   #0,r6   ;movsi   #0->r6
   store   r6,(r0)   ;movsi   r6->(r0)
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #4,r4   ;isubqtsi3   r4-#4->r4
   move   r4,r0   ;movsi   r4->r0
   load   (r0),r4   ;movsi   (r0)->r4
   moveq   #9,r0   ;movsi   #9->r0
   cmp   r4,r0   ;rcmpsi   r4,r0
   movei   #L2,TMP
   jump   GT,(TMP)
   nop      ;jgt   L2
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #8,r4   ;isubqtsi3   r4-#8->r4
   move   r4,r0   ;movsi   r4->r0
   movei   #100,r6   ;movsi   #100->r6
   store   r6,(r0)   ;movsi   r6->(r0)
   movei   #L3,TMP
   jump   T,(TMP)
   nop      ;jt   L3
   .EVEN
L2:
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #4,r4   ;isubqtsi3   r4-#4->r4
   move   r4,r0   ;movsi   r4->r0
   load   (r0),r4   ;movsi   (r0)->r4
   moveq   #9,r0   ;movsi   #9->r0
   cmp   r4,r0   ;rcmpsi   r4,r0
   movei   #L4,TMP
   jump   GT,(TMP)
   nop      ;jgt   L4
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #8,r4   ;isubqtsi3   r4-#8->r4
   move   r4,r0   ;movsi   r4->r0
   moveq   #10,r6   ;movsi   #10->r6
   store   r6,(r0)   ;movsi   r6->(r0)
   movei   #L5,TMP
   jump   T,(TMP)
   nop      ;jt   L5
   .EVEN
L4:
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #4,r4   ;isubqtsi3   r4-#4->r4
   move   r4,r0   ;movsi   r4->r0
   load   (r0),r4   ;movsi   (r0)->r4
   cmpq   #0,r4   ;tstsi   r4
   movei   #L6,TMP
   jump   EQ,(TMP)
   nop      ;jeq   L6
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #8,r4   ;isubqtsi3   r4-#8->r4
   move   r4,r0   ;movsi   r4->r0
   moveq   #1,r6   ;movsi   #1->r6
   store   r6,(r0)   ;movsi   r6->(r0)
L6:
L5:
L3:
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #8,r4   ;isubqtsi3   r4-#8->r4
   move   r4,r5   ;movsi   r4->r5
   load   (r5),r0   ;movsi   (r5)->r0
   movei   #L1,TMP
   jump   T,(TMP)
   nop      ;jt   L1
   .EVEN
L1:
   move   FP,ST
   load   (ST),FP
   addqt   #4,ST   ;unlk
   _RTS
   .EVEN
_GetTest2::
   subqt   #4,ST
   store   FP,(ST)
   move   ST,FP   ;link
   subqt   #8,ST
   move   FP,r1   ;movsi   FP->r1
   move   FP,r2   ;movsi   FP->r2
   subqt   #4,r2   ;isubqtsi3   r2-#4->r2
   move   r2,r3   ;movsi   r2->r3
   store   r0,(r3)   ;movsi   r0->(r3)
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #8,r4   ;isubqtsi3   r4-#8->r4
   move   r4,r0   ;movsi   r4->r0
   moveq   #0,r6   ;movsi   #0->r6
   store   r6,(r0)   ;movsi   r6->(r0)
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #4,r4   ;isubqtsi3   r4-#4->r4
   move   r4,r5   ;movsi   r4->r5
   load   (r5),r0   ;movsi   (r5)->r0
   moveq   #9,r4   ;movsi   #9->r4
   cmp   r4,r0   ;cmpsi   r4,r0
   movei   #L18,TMP
   jump   GT,(TMP)
   nop      ;jgt   L18
   moveq   #1,r4   ;movsi   #1->r4
   cmp   r4,r0   ;cmpsi   r4,r0
   movei   #L18,TMP
   jump   MI,(TMP)
   nop      ;jlt   L18
   movei   #L9,TMP
   jump   T,(TMP)
   nop      ;jt   L9
   .EVEN
L9:
L10:
L11:
L12:
L13:
L14:
L15:
L16:
L17:
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #8,r4   ;isubqtsi3   r4-#8->r4
   move   r4,r0   ;movsi   r4->r0
   moveq   #1,r6   ;movsi   #1->r6
   store   r6,(r0)   ;movsi   r6->(r0)
   movei   #L8,TMP
   jump   T,(TMP)
   nop      ;jt   L8
   .EVEN
L18:
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #8,r4   ;isubqtsi3   r4-#8->r4
   move   r4,r0   ;movsi   r4->r0
   moveq   #10,r6   ;movsi   #10->r6
   store   r6,(r0)   ;movsi   r6->(r0)
L8:
   move   FP,r0   ;movsi   FP->r0
   move   FP,r4   ;movsi   FP->r4
   subqt   #8,r4   ;isubqtsi3   r4-#8->r4
   move   r4,r5   ;movsi   r4->r5
   load   (r5),r0   ;movsi   (r5)->r0
   movei   #L7,TMP
   jump   T,(TMP)
   nop      ;jt   L7
   .EVEN
L7:
   move   FP,ST
   load   (ST),FP
   addqt   #4,ST   ;unlk
   _RTS
   .EVEN
_Test3::
   subqt   #4,ST
   store   FP,(ST)
   move   ST,FP   ;link
   subqt   #32,ST
   subqt   #8,ST
   move   ST,r14
   store   r19,(ST)
   store   r20,(r14+1)
   store   r21,(r14+2)
   store   r22,(r14+3)
   store   r23,(r14+4)
   store   r24,(r14+5)
   move   FP,r19   ;movsi   FP->r19
   move   FP,r20   ;movsi   FP->r20
   subqt   #4,r20   ;isubqtsi3   r20-#4->r20
   move   r20,r21   ;movsi   r20->r21
   store   r0,(r21)   ;movsi   r0->(r21)
   move   FP,r0   ;movsi   FP->r0
   move   FP,r1   ;movsi   FP->r1
   subqt   #8,r1   ;isubqtsi3   r1-#8->r1
   move   r1,r0   ;movsi   r1->r0
   moveq   #0,r3   ;movsi   #0->r3
   store   r3,(r0)   ;movsi   r3->(r0)
   move   FP,r0   ;movsi   FP->r0
   move   FP,r1   ;movsi   FP->r1
   subqt   #16,r1   ;isubqtsi3   r1-#16->r1
   move   r1,r0   ;movsi   r1->r0
   moveq   #0,r3   ;movsi   #0->r3
   store   r3,(r0)   ;movsi   r3->(r0)
L21:
   move   FP,r0   ;movsi   FP->r0
   move   FP,r1   ;movsi   FP->r1
   subqt   #8,r1   ;isubqtsi3   r1-#8->r1
   move   r1,r0   ;movsi   r1->r0
   move   FP,r1   ;movsi   FP->r1
   move   FP,r2   ;movsi   FP->r2
   subqt   #4,r2   ;isubqtsi3   r2-#4->r2
   move   r2,r1   ;movsi   r2->r1
   load   (r0),r0   ;movsi   (r0)->r0
   load   (r1),r1   ;movsi   (r1)->r1
   cmp   r1,r0   ;cmpsi   r1,r0
   movei   #L24,TMP
   jump   MI,(TMP)
   nop      ;jlt   L24
   movei   #L22,TMP
   jump   T,(TMP)
   nop      ;jt   L22
   .EVEN
L24:
   move   FP,r0   ;movsi   FP->r0
   move   FP,r1   ;movsi   FP->r1
   subqt   #12,r1   ;isubqtsi3   r1-#12->r1
   move   r1,r0   ;movsi   r1->r0
   move   FP,r1   ;movsi   FP->r1
   move   FP,r2   ;movsi   FP->r2
   subqt   #8,r2   ;isubqtsi3   r2-#8->r2
   move   r2,r1   ;movsi   r2->r1
   moveq   #1,r2   ;movsi   #1->r2
   load   (r1),r1   ;movsi   (r1)->r1
   neg   r1   ;negsi2   r1->r1
   sha   r1,r2   ;iashlsi3   r2<<r1->r2
   neg   r1   ;negsi2   r1->r1
   store   r2,(r0)   ;movsi   r2->(r0)
   move   FP,r0   ;movsi   FP->r0
   move   FP,r1   ;movsi   FP->r1
   subqt   #16,r1   ;isubqtsi3   r1-#16->r1
   move   r1,r22   ;movsi   r1->r22
   move   ST,r0   ;movsi   ST->r0
   move   FP,r1   ;movsi   FP->r1
   move   FP,r0   ;movsi   FP->r0
   subqt   #8,r0   ;isubqtsi3   r0-#8->r0
   move   r0,r1   ;movsi   r0->r1
   load   (r1),r0   ;movsi   (r1)->r0
   movei   #_GetTest1,r23   ;movsi   #_GetTest1->r23
   move   PC,TMP
   subqt   #4,ST
   addqt   #10,TMP
   jump   T,(r23)
   store   TMP,(ST)   ;call   r23->r0
   move   r0,r23   ;movsi   r0->r23
   move   ST,r0   ;movsi   ST->r0
   move   FP,r1   ;movsi   FP->r1
   move   FP,r0   ;movsi   FP->r0
   subqt   #12,r0   ;isubqtsi3   r0-#12->r0
   move   r0,r1   ;movsi   r0->r1
   load   (r1),r0   ;movsi   (r1)->r0
   movei   #_GetTest2,r24   ;movsi   #_GetTest2->r24
   move   PC,TMP
   subqt   #4,ST
   addqt   #10,TMP
   jump   T,(r24)
   store   TMP,(ST)   ;call   r24->r0
   move   FP,r1   ;movsi   FP->r1
   move   FP,r2   ;movsi   FP->r2
   subqt   #16,r2   ;isubqtsi3   r2-#16->r2
   move   r2,r1   ;movsi   r2->r1
   add   r23,r0   ;iaddsi3   r23+r0->r0
   load   (r1),r1   ;movsi   (r1)->r1
   add   r1,r0   ;iaddsi3   r1+r0->r0
   store   r0,(r22)   ;movsi   r0->(r22)
L23:
   move   FP,r0   ;movsi   FP->r0
   move   FP,r1   ;movsi   FP->r1
   subqt   #8,r1   ;isubqtsi3   r1-#8->r1
   move   r1,r0   ;movsi   r1->r0
   move   FP,r1   ;movsi   FP->r1
   move   FP,r2   ;movsi   FP->r2
   subqt   #8,r2   ;isubqtsi3   r2-#8->r2
   move   r2,r0   ;movsi   r2->r0
   move   FP,r1   ;movsi   FP->r1
   move   FP,r2   ;movsi   FP->r2
   subqt   #8,r2   ;isubqtsi3   r2-#8->r2
   move   r2,r1   ;movsi   r2->r1
   load   (r1),r2   ;movsi   (r1)->r2
   move   r2,r1   ;movsi   r2->r1
   addqt   #1,r1   ;iaddqtsi3   #1+r1->r1
   move   r1,r2   ;movsi   r1->r2
   store   r2,(r0)   ;movsi   r2->(r0)
   movei   #L21,TMP
   jump   T,(TMP)
   nop      ;jt   L21
   .EVEN
L22:
   move   FP,r0   ;movsi   FP->r0
   move   FP,r1   ;movsi   FP->r1
   subqt   #16,r1   ;isubqtsi3   r1-#16->r1
   move   r1,r2   ;movsi   r1->r2
   load   (r2),r0   ;movsi   (r2)->r0
   movei   #L20,TMP
   jump   T,(TMP)
   nop      ;jt   L20
   .EVEN
L20:
   move   ST,r14
   load   (ST),r19
   load   (r14+1),r20
   load   (r14+2),r21
   load   (r14+3),r22
   load   (r14+4),r23
   load   (r14+5),r24
   move   FP,ST
   load   (ST),FP
   addqt   #4,ST   ;unlk
   _RTS
   .LONG
   .68000
_test_end::
_test_size   .EQU   *-_test_start
   .GLOBL   _test_size
   .IF   _test_size>$1000
   .PRINT   "Code size (",/l/x _test_size,") is over $1000"
   .FAIL
   .ENDIF
Here are the results:

Code: Select all

C:\vasm\test>vasmjagrisc_madmac -o test.o test.s
vasm 1.7c (c) in 2002-2015 Volker Barthelmann
vasm Jaguar RISC cpu backend 0.4 (c) 2014-2015 Frank Wille
vasm madmac syntax module 0.1 (c) 2015 Frank Wille
vasm test output module 1.0 (c) 2002 Volker Barthelmann

error 2 in line 335 of "test.s": unknown mnemonic <.68000>
>   .68000

error 31 in line 339 of "test.s": expression must be constant
>   .IF   _test_size>$1000

error 54: non-relocatable expression in equate <_test_size>
My limited understanding is that everything past the .68000 directive is all m68k asm code. For a first run I think this is very very impressive. Have reported these bugs already.

Re: JRISC VASM Madmac syntax

Posted: Sat Mar 28, 2015 2:18 am
by a31chris


> error 2 in line 335 of "test.s": unknown mnemonic <.68000>
> > .68000

Hmm. From this context I doubt that I can get away with just ignoring
.68000, although there are no M68k instructions in the source.

Seems like .68000 also switches back from absolute assembling (to the
fixed address $f03000) to the .text section. This makes the label
_test_end being placed in .text again.


> error 31 in line 339 of "test.s": expression must be constant
> > .IF _test_size>$1000

It's probably because of:

_test_size .EQU *-_test_start

The difference between two labels is not constant in vasm, as there
may always be optimizations in a later pass. But the parser needs a
constant for conditional assembly in the first pass.

I will look into that.


Regards,

--
Frank Wille

Re: JRISC VASM Madmac syntax

Posted: Sat Mar 28, 2015 2:19 am
by a31chris
> error 2 in line 335 of "test.s": unknown mnemonic <.68000>
> > .68000
>
> error 31 in line 339 of "test.s": expression must be constant
> > .IF _test_size>$1000

Ok, the reason was that vasm handles ORG differently than madmac/smac.

Usually ORG starts a separate section with a fixed base address
defined by ORG. But in the Jaguar/Madmac case it is more like a RORG,
relocating the labels inside a still active text section.

And .68000 seems to work like ending such a RORG-block.

I wanted to keep the usual function of ORG to make the madmac syntax
module also usable for other CPUs, so I implemented the new option
"-rorg", which changes the function of .ORG and .68000 in the way you
need it.

Your test source assembles now. New snapshot available in 11 hours.

frank@sun ../../vasmjagrisc_madmac -rorg -Faout gcc.s
vasm 1.7c © in 2002-2015 Volker Barthelmann
vasm Jaguar RISC cpu backend 0.4 © 2014-2015 Frank Wille
vasm madmac syntax module 0.2 © 2015 Frank Wille
vasm a.out output module 0.6 © 2008-2015 Frank Wille

.text(acrx2): 640 bytes


Regards,

--
Frank Wille

Re: JRISC VASM Madmac syntax

Posted: Sat Mar 28, 2015 11:15 pm
by a31chris

Code: Select all

C:\vasm\test>vasmjagrisc_madmac -rorg -Faout test.s
vasm 1.7c (c) in 2002-2015 Volker Barthelmann
vasm Jaguar RISC cpu backend 0.4 (c) 2014-2015 Frank Wille
vasm madmac syntax module 0.2 (c) 2015 Frank Wille
vasm a.out output module 0.6 (c) 2008-2015 Frank Wille

.text(acrx2):            640 byte

C:\vasm\test>
vasmjagrisc_madmac.zip
Win32 build of vasm_madmac w/syntax module 0.2
(162.32 KiB) Downloaded 90 times

Re: JRISC VASM Madmac syntax

Posted: Tue Mar 31, 2015 3:40 am
by a31chris
Did a quick vasm test on gorf's source file for his jrisc gcc experiments.

Here is the source:

Code: Select all

	MACRO	_RTS
	load	(ST),TMP
	jump	T,(TMP)
	addqt	#4,ST	;rts
	ENDM

_jag_start::
	.GPU
	.ORG	$F03000
ST	.REGEQU	r31
TMP	.REGEQU	r16
GT	.CCDEF	$15
LE      .CCDEF  $1C

gcc2_compiled_for_madmac:
	;(.DATA)
	.LONG

_byte_line::
	.DC.L	320
	;(.TEXT)
	.EVEN

_start::
        movei   #$F04000,ST             ; stack pointer = $F04000
        moveq   #0,r0                   ; r0 = x1
        moveq   #0,r1                   ; r1 = y1
        movei   #_video_buffer,r3       ; r3 = pointer to video_buffer
        movei   #319,r2                 ; r2 = x2
        movei   #1703936,r6             ; r6 = start of video_buffer

        movei   #_Draw_Line,r5          ; r5 = the address of DrawLine fnc.
        store   r6,(r3)                 ; video_buffer points to video start
        moveq   #4,r4                   ; r4 = color
        movei   #239,r3                 ; r3 = y2
        move    PC,TMP                  ; this 
        subqt   #4,ST                   ; is 
        addqt   #10,TMP                 ; for
        jump    T,(r5)                  ; calling the routine
        store   TMP,(ST)                ; call   r5

        moveq   #6,r2                   ; r2 = pixel color
        movei   #100,r0                 ; r0 = x
        movei   #_Plot_Pixel_Fast,r3    ; r3 = get address of routine
        move    r0,r1                   ; r1 = y
	move	PC,TMP
	subqt	#4,ST
	addqt	#10,TMP
	jump	T,(r3)
	store	TMP,(ST)	;call	r3

loop:
        jr      T,loop
	nop	;FOREVER
	.EVEN

_Draw_Line::
        moveq   #0,r6                   ; clear r6 ?(error variable maybe)
        move    r2,r7                   ; r7 = x2
        movei   #_video_buffer,r5       ; r5 = address of video start
        sub     r0,r7                   ; r7 = dx (x2 - x1)
        move    r1,r2                   ; r2 = y1
        load    (r5),r5                 ; r5 = video pointer
        sub     r1,r3                   ; r3 = dy (y2 - y1)
        shlq    #6,r2                   ; (y1<<6) 
        add     r5,r2                   ; + vid_start (r2 = vidpos pointer)
        shlq    #8,r1                   ; (y1<<8)
        add     r1,r2                   ; + vid_start (r2 = vidpos pointer)  
        move    r2,r5                   ; put vidpos pointer back in r5
        cmpq    #0,r7                   ; is dx negitive?
        jr      MI,dxp_xim              ; set dx = pos | x_inc = neg
        add     r0,r5                   ; add x1 to vidpos
        jr      T,dxm_xip               ; set dx = neg | x_inc = pos
        moveq   #1,r2                   ; this line sets x_inc = 1 (RISC)
	.EVEN

dxp_xim:
        moveq   #0,r2                   ; r2 = 0
        neg     r7                      ; dx = pos(was neg)
        subqt   #1,r2                   ; x_inc = -1

dxm_xip:
        cmpq    #0,r3                   ; is dy negitive?
        jr      MI,dyp_yim              ; set dy = pos | y_inc = neg
        nop                             ; pad instruction cache
        movei   #_byte_line,r0          ; r0 = points to y_inc 
        jr      T,dyn_yip               ; set dy = neg | y_inc = pos
        load    (r0),r0                 ; this line sets r0 = y_inc (RISC) 
	.EVEN

dyp_yim:
        movei   #_byte_line,r0          ; r0 point to y_inc
        load    (r0),r0                 ; r0 = y_inc
        neg     r3                      ; dy = pos (was neg)
        neg     r0                      ; y_inc = -320

dyn_yip:
        cmp     r7,r3                   ; is dy(r3) greater dx(r7) 
        movei   #do_line_y,TMP          ; set up jump pointer
        jump    GT,(TMP)                ; if so do a y incremented line
        moveq   #0,r1                   ; cache padded instruction
        cmp     r7,r1                   ; is dy(r3) greater than index
        movei   #leave_draw,TMP         ; then we are done and
        jump    GT,(TMP)                ; and we can now
        nop                             ; leave
L31:
        add     r3,r6                   ; error += dy
        cmp     r6,r7                   ; if error>dx
        jr      GT,L32                  ; jump to 
        storeb  r4,(r5)                 ; plot line point in video_buffer
        sub     r7,r6                   ; error -= dx
        add     r0,r5                   ; video_pointer += y_inc
L32:
        addqt   #1,r1                   ; index++
        cmp     r1,r7                   ; index(r1) < dx?
        jr      GT,L31                  ; no, then do next pixel
        add     r2,r5                   ; video_pointer += x_inc
        movei   #leave_draw,TMP         ; index is greater so
        jump    T,(TMP)                 ; lets get out
        nop                             ; here
        .EVEN                           

do_line_y:                               
        cmp     r3,r1                   ; index > dy? 
        jr      GT,leave_draw           ; if so, later
	nop
L38:                                    
        add     r7,r6                   ; error += dy 
        jr      LE,L39                  ; if error goes 0 or neg?
        storeb  r4,(r5)                 ; plot line point to video_buffer
        sub     r3,r6                   ; error -= dy
        add     r2,r5                   ; video_pointer += x_inc
L39:
        addqt   #1,r1                   ; index += 1
        cmp     r1,r3                   ; dx > index?
        jr      GT,L38                  ; if so, continue
        add     r0,r5                   ; video_pointer += y_inc
leave_draw:
	_RTS
	.EVEN

_Plot_Pixel_Fast::
        move    r1,r4                   ; r4 = y
        movei   #_video_buffer,r3       ; r3 = video buffer start address
        shlq    #8,r4                   ; r4 = (y<<8) 
        shlq    #6,r1                   ; r1 = (y<<6) 
        load    (r3),r3                 ; r3 points to video_start
        add     r1,r4                   ; (y<<8) + (y<<6) +
        add     r0,r3                   ; x +
        add     r4,r3                   ; video_start 
        storeb  r2,(r3)                 ; plot the pixel with color in r2
        _RTS                            ; done

_video_buffer::	.DCB.B	8,0
	.LONG
	.68000

_jag_end::
_jag_size      .EQU    _jag_end - _jag_start
      .GLOBL  _jag_size
      .IF     _jag_size>$1000
      .PRINT  "Code size (",/l/x _jag_size,") is over $1000"
	.FAIL
	.ENDIF
VASM assembled it with no errors.

Code: Select all

C:\vasm\test>vasmjagrisc_madmac -rorg -Faout -o jagcircle.o jagcircle.s
vasm 1.7c (c) in 2002-2015 Volker Barthelmann
vasm Jaguar RISC cpu backend 0.4 (c) 2014-2015 Frank Wille
vasm madmac syntax module 0.2 (c) 2015 Frank Wille
vasm a.out output module 0.6 (c) 2008-2015 Frank Wille

.text(acrx2):            280 byte

C:\vasm\test>

Re: Volker Barthelman's/Frank Wille's Vasm assembler(madmac)

Posted: Mon May 18, 2015 6:52 am
by a31chris
Jaguar specific updates for vasm 1.7c
  • New syntax module: madmac, which tries to be compatible to the Atari Madmac assembler syntax, used for 6502, 68000 and Jaguar RISC targets.
    jagrisc: Added absolute and relative 5 bit source operand relocations. Fixed relative JR relocations.
    jagrisc: Fixed (R14+Rn) addressing mode.
    jagrisc: New JRISC specific directives: GPU, DSP, REGEQU, EQUR, REGUNDEF, EQURUNDEF, CCDEF, CCUNDEF (madmac/smac compatible).
    elf-output: Add support for jagrisc (EM_JAGRISC = 0x9004). This is an unofficial definition done by the Jaguar scene.
    aout-output: Absolute ORG sections are appended to a .text section. Support for Jaguar, which uses MID 0.
The complete list of updates beyond that can be found here:

http://sun.hasenbraten.de/vasm/

Re: Volker Barthelman's/Frank Wille's Vasm assembler(madmac)

Posted: Sat Jun 08, 2019 4:31 pm
by a31chris
Latest Win32 convenience builds of the 3 syntaxes can be found here:

http://atariage.com/forums/topic/235242 ... ?p=4257267